In semiconductor manufacturing fields such as MEMS devices, power devices and advanced packaging, deep silicon etching is one of the core processes for enabling device miniaturization and higher performance. However, the frequent occurrence of “black silicon” during etching has become a key bottleneck affecting process yield and device reliability. Black silicon essentially refers to micron-scale rough protrusions or porous structures formed on the silicon surface after etching. It can degrade electrical performance and also affect subsequent packaging and interconnect quality. This article explains the causes of black silicon and introduces three effective surface passivation strategies for achieving smooth, mirror-like etched sidewalls.
The formation of black silicon in deep silicon etching is mainly caused by the loss of dynamic balance between etching and passivation. Mainstream deep silicon etching processes, such as the Bosch process, use alternating etching and passivation cycles. When the etching rate of SF₆ exceeds the deposition rate of the C₄F₈ passivation gas, a uniform polymer passivation layer cannot form on the silicon surface. High-energy ions then bombard the surface irregularly, creating rough microstructures. In addition, fluctuations in chamber pressure, unstable electrode power and deviations in gas ratio can further intensify the black silicon problem.
To solve black silicon, the key approach is to rebuild the etching-passivation balance by optimizing surface passivation. The following three passivation strategies have been validated in industrial practice and each has suitable application scenarios and technical advantages.
The first approach is optimized polymer passivation. This method is based on an improved Bosch process and focuses on adjusting passivation gas ratios and process parameters. By increasing the C₄F₈ gas flow ratio or introducing new passivation gases such as CF₃I, the density and coverage uniformity of the polymer film can be improved. At the same time, chamber pressure, RF power and passivation time during the passivation step can be optimized to ensure complete coverage of silicon sidewalls and surfaces, preventing direct bombardment by high-energy ions. This solution does not require major equipment modification and has relatively low cost. It is suitable for mature processes that require strong process compatibility. After optimization, silicon sidewall roughness can be reduced to below 5 nm.
The second approach is ALD-assisted passivation. For high-aspect-ratio structures where conventional passivation is difficult to cover uniformly, atomic layer deposition can deposit ultra-thin and highly uniform oxide passivation layers such as Al₂O₃ or HfO₂ during etching intervals through chemical adsorption. Unlike polymer passivation, ALD passivation layers provide better high-temperature resistance and chemical stability and can continuously protect sidewalls during subsequent etching. With the self-limiting growth mechanism of ALD, passivation thickness can be precisely controlled, even down to 1–2 nm, avoiding excessive passivation that would significantly reduce etching rate. This strategy is suitable for advanced processes such as 3D NAND and high-aspect-ratio MEMS structures, enabling sidewall verticality above 89.9° and roughness below 3 nm.
The third approach is plasma-modified passivation. This method adds a plasma treatment step after etching to modify and passivate the silicon surface. Mixed O₂ and N₂ plasma treatment can remove residual polymer contaminants while forming an ultra-thin SiOₓNᵧ passivation layer on the surface. This layer not only repairs etch-induced surface defects but also improves the chemical stability of the silicon surface, reducing oxidation and contamination in subsequent processes. The process flow is simple and can be added as a supplementary step to existing processes. It is especially suitable for devices that require bonding or metallization after etching, helping improve long-term reliability.
In summary, black silicon is fundamentally caused by an imbalance between etching and passivation. Targeted surface passivation optimization can effectively solve the problem. Optimized polymer passivation offers broad compatibility and low cost; ALD-assisted passivation is suitable for advanced high-aspect-ratio structures; and plasma-modified passivation is more suitable for applications with demanding downstream process compatibility. In practical applications, the passivation strategy should be selected according to device structure, aspect ratio and cost requirements, and combined with closed-loop process parameter control to achieve stable, smooth deep silicon etching for high-performance semiconductor device manufacturing.
