Deep Silicon Etching (DSE) is an important micro/nano fabrication technology for MEMS, semiconductor packaging, optical devices and biochips. It can create high-aspect-ratio structures such as deep trenches, through-holes and complex three-dimensional features in silicon wafers, providing a manufacturing foundation for modern miniaturized devices.
Deep silicon etching forms high-aspect-ratio features in silicon substrates through physical or chemical material removal. Two mainstream routes are commonly used. Reactive Ion Etching (RIE) uses active ions in plasma to bombard the silicon surface and provides anisotropic etching, but it is usually more suitable for shallower structures with limited aspect ratios.
Deep Reactive Ion Etching (DRIE) is designed for deeper and higher-aspect-ratio features. In the Bosch process, etching with SF₆ plasma alternates with passivation by C₄F₈ deposition, allowing structures with aspect ratios of 50:1 or higher. Cryogenic DRIE operates below about -100°C and can reduce sidewall roughness, making it attractive for optical devices.
Sidewall roughness and scalloping. The alternating etch-passivation cycle in the Bosch process may create a scalloped sidewall profile, which can affect optical and mechanical performance. Process-parameter optimization or cryogenic DRIE can reduce this effect.
Micromasking. Particles generated during etching may create local abnormal etching. Improving mask quality and optimizing gas ratios are common solutions.
Aspect Ratio Dependent Etching (ARDE). As feature depth increases, the etch rate may decrease, causing non-uniform depths across structures. RF power, gas flow and multi-step etching strategies can be adjusted to compensate.
Crystal-orientation dependence. Different silicon crystal orientations may etch at different rates, affecting the precision of complex structures. Using (100) wafers or optimizing mask design helps improve consistency.
Deep silicon etching is used in MEMS sensors, through-silicon vias, microfluidic channels, optical components and biomedical chips. Future development will pursue higher-aspect-ratio etching above 100:1 for next-generation 3D integration and advanced MEMS devices.
Atomic Layer Etching (ALE) may provide single-layer precision and reduce damage. Integration with advanced lithography technologies such as EUV and nanoimprint lithography will support smaller micro/nano features. Greener etching processes that reduce the use of greenhouse gases such as SF₆ are also becoming important.
As a core technology in micro/nano manufacturing, deep silicon etching continues to support rapid development in MEMS, semiconductor packaging, optics and biomedical devices. With process optimization and new technologies, it will play an even more important role in 3D integration, smart sensors and quantum devices.
