Micro/nano manufacturing is like a form of precision time carving, condensing billions of transistors onto a wafer only a few inches across. From the circuit blueprint defined by lithography to the final separation of chips by dicing, every step reflects human control over the microscopic world. This manufacturing journey across the nanoscale is not only a continuous evolution of technology, but also a foundation of modern technological civilization.
Lithography is the “soul process” of micro/nano manufacturing and is often described as carving circuits with light. The process begins with wafer pretreatment, followed by high-temperature oxidation to form a dense silicon dioxide protective layer that supports subsequent pattern transfer. Photoresist is then uniformly coated onto the wafer as it spins at high speed, forming a flat micron-scale photosensitive film. After soft baking, the lithography system uses a mask carrying the circuit blueprint. Extreme ultraviolet light passes through the mask pattern and is precisely focused by multilayer optics onto the wafer surface, completing circuit projection. After exposure, post-exposure bake strengthens the reaction, and the developer removes the exposed or unexposed regions according to the resist type, revealing a fine circuit pattern. This step directly determines chip performance; EUV lithography, with a 13.5 nm wavelength, enables advanced nodes at 3 nm and below, while mirror surface fluctuations must be controlled at the sub-nanometer level.
The pattern left by lithography is only a temporary template. The formation of real circuit structures relies on etching and doping. Etching acts like a microscopic carving tool, removing oxide or substrate regions not protected by photoresist to form trenches and vias. Dry etching uses directional plasma bombardment to achieve vertical and precise pattern transfer, making it the mainstream option for advanced processes. Wet etching removes materials through chemical solutions and is more suitable for non-critical layers. After etching, doping injects electrical functionality into silicon by introducing impurities such as boron or phosphorus through high-temperature diffusion or ion implantation, forming P-wells, N-wells and the core PN junction structures of transistors. These steps are repeated dozens of times to build complex three-dimensional circuit networks layer by layer.
After multiple cycles of deposition, lithography and etching, the wafer is filled with dense chip arrays. The final step is chip dicing. Before cutting, the wafer is firmly attached to blue tape to prevent chips from scattering or being damaged during separation. A high-precision blade then travels along predefined streets to divide the wafer into individual die. Fine particles are generated during dicing and must be removed through synchronized cleaning to avoid affecting subsequent packaging quality. The accuracy required in this step is no less demanding than lithography; even micron-scale deviation may cause chip failure. From lithography blueprint to chip dicing, every step of micro/nano manufacturing demonstrates how small deviations can lead to large consequences. This journey depends not only on key equipment such as EUV lithography systems, but also on critical materials such as photoresists and photomasks. As AI, new energy and other industries continue to develop, the demand for chip performance will keep pushing micro/nano manufacturing toward higher precision and stronger integration.
